2nm

China prepares a 2nm AI chip to end NVIDIA’s dominance. Your problem is how you are going to manufacture it

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A new chip designer for artificial intelligence (IA) is preparing to take the field in China. And he intends to make a lot of noise. In fact, it is already doing so. It’s called Dishan Technology, and, according to SCMP, is already verifying the prototype of a 2nm AI GPU that uses a hybrid integration technology that combines FinFET and GAA transistors (Gate-All-Around). However, this is not the only thing that has emerged. According to Dishan Technology, this chip will be 40% more energy efficient than its predecessor and will be compatible with CUDA (Compute Unified Device Architecture), from NVIDIA. This latest technology brings together the compiler and development tools used by programmers to develop their software for NVIDIA GPUs, so if Dishan’s chip is really compatible it will be much easier to integrate it into facilities that already have GPUs from this American company. Although, as I mentioned above, Dishan already has a prototype of its chip, it will take another year or two to refine its technology enough to make large-scale manufacturing possible. Be that as it may, what has not been revealed is who is going to manufacture it. SMICthe largest Chinese semiconductor producer, can currently only manufacture 7nm chips using the multiple patterning. And TSMC, Intel and Samsung, which could produce it, will hardly do so in the current geopolitical context due to the demands of the US sanctions on China. We will see how Dishan Technology solves this challenge. China already has three “champions” in its AI chip ecosystem The country led by Xi Jinping you already have three alternatives very clear to NVIDIA. Although not as well-known as Huawei or Moore Threads, Cambricon Technologies is one of the companies specialized in designing GPUs for AI with the greatest growth potential. In fact, in August 2025 it received approval from the Shanghai Stock Exchange (China) to raise $560 million. He is allocating them to the design of four chips for training and inference of AI models, and also to the development of an alternative to CUDA. Moore Threads has developed several GPUs that rival advanced solutions from NVIDIA, AMD or Huawei On the other hand, Moore Threads has developed several GPUs for AI applications that, on paper, rival some of the advanced solutions that NVIDIA, AMD or Huawei have placed on the market. The cards MTT S4000 and MTT S3000 They are its most interesting proposals right now, although, curiously, the MTT S80 card also appears in its portfolio, a proposal for games and content creation that, according to Moore Threads itself, has a computing capacity of 14.4 TFLOPS in single-precision floating point operations. The other indispensable player in the Chinese AI chip industry is Huawei. His most ambitious proposal right now is the chip Ascend 950PRwhich aims to surpass the performance of the GPU NVIDIA H100. However, this Chinese company also launched its chips last year Ascend 910D and 920. This last solution is clearly intended to compete in the Chinese market with NVIDIA’s H20 GPU. Presumably at the end of 2026 it will launch its Ascend 950DT chip, and the Ascend 960 and 970 GPUs will arrive in 2027 and 2028 respectively. Image | Generated by Xataka with Gemini More information | SCMP In Xataka | TSMC acknowledges that it has considered taking its factories out of Taiwan. It’s impossible for a good reason. In Xataka | The looming bottleneck in AI is neither RAM nor gas: it’s that TSMC’s N3 node is absolutely saturated

Samsung faces a very serious problem to surpass TSMC with its 2nm chips: the 60% curse

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When semiconductor manufacturers produce a chip wafer, some of those cores do not function properly. It’s normal. When they start a new lithographic node your performance per wafer usually has a wide room for improvementbut little by little, as engineers refine their integration processes, this parameter improves. A mature lithography can deliver very high performance to IC manufacturers, but a nascent technology can move in the orbit of 50% performance. Importantly, chipmakers need the per-wafer yield to be at least 60% to ensure node profitability and attract more customers. However, this figure is the minimum admissible. And in reality it must be much higher to optimize the competitiveness of photolithography from a commercial point of view. Currently TSMC and Samsung are manufacturing 2nm chipsbut according to the leaks the performance per wafer of its nodes is very different. And the South Korean company needs its 2nm node to be a success. The 1 and 2 nm nodes are crucial in the itinerary that Samsung has planned This reflection that Han Jong-hee, co-CEO of Samsung, made in mid-2025 express clearly At what point were you then? the largest company in South Korea: “First of all, I sincerely apologize that our stock performance has not met your expectations. Over the past year, our company has not responded appropriately to the rapidly evolving AI semiconductor market.” These words were addressed to his investors. Samsung needs to make its current best chip manufacturing technology a success A very important idea emerges from Jong-hee’s words: the competitiveness of your subsidiary specialized in the manufacturing of integrated circuits is essential for Samsung. Even so, problems were arising from several fronts. “Our technological advantage has been compromised in all of our businesses. It is difficult to see that efforts are being made to drive great innovations or take on new challenges. There are only attempts to maintain the status quo instead of generating disruptive changes,” said an internal statement written by Jay Y. Lee, the company’s president. In this scenario, Samsung needs its current best chip manufacturing technology, 2nm lithography, to be a success. And it’s in it. Integrated circuit producers do not typically make the per-wafer yield of their cutting-edge lithographs public, especially if it is relatively low. However, according to DigiTimes Asia Currently the performance of its 2nm nodes oscillates around 55%, so it is below the 60% threshold that we talked about a few lines above. For this company, it is essential to increase the yield per wafer of its 2nm lithography because with a yield of 55% the percentage of usable chips after advanced packaging probably ranges around 40%. To curl the curl, again according to DigiTimes Asiathe per-wafer performance of TSMC’s 2nm nodes ranges between 60 and 70%which places this Taiwanese company, which is Samsung’s biggest competitor and the leader of the chip manufacturing industryin a very favorable position when it comes to attracting new clients. If Samsung manages to raise the performance of its 2nm nodes above 60% during the coming months, it will put up a fight against TSMC. Otherwise you will suffer. Image | Generated by Xataka with Gemini More information | DigiTimes Asia In Xataka | We already know what the chips that will arrive until 2039 will be like. The machine that will allow them to be manufactured is close

Samsung opens the era of 2nm chips with the Exynos 2600. Chances are we won’t notice much

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Samsung has announced officially the Exynos 2600 SoC. This smartphone chip is especially notable for one particular feature: it is the first to be manufactured with 2 nm photolithography. The question, of course, is whether that will change things much. Why is it important. Node jumps in photolithographic processes are especially striking because they usually lead to significant improvements in performance and efficiency. By reducing the scale it is possible to fit more transistors in the same space, which in essence ends up giving us “more for the same.” The Samsung Exynos 2600 goes precisely in that direction. The data. Samsung’s new System-on-a-Chip (SoC) boasts above all of that new 2nm GAA (Gate-All-Around) manufacturing process, and is composed of the following elements: CPU: ten cores in total. The configuration features one 3.8 GHz C1-Ultra core, three 3.25 GHz C1-Pro cores, and six 2.75 GHz C1-Pro cores. GPU: Samsung Xclipse 960 NPU: 32K MAC What can we expect. According to Samsung, this new CPU increases performance by 39% compared to the Exynos 2500. The Xclipse 960 GPU manages to double the computing capacity of its predecessor and 50% more performance in ray-tracing. And finally, the NPU allows 113% more performance than its predecessor, which will allow you to enjoy AI functions in a theoretically notable way. 320 MP sensors. Another of the differentiating elements of this SoC is the support for sensors of up to 320 MP, in addition to offering zero latency for captures of up to 108 MP. Or what is the same: you take snapshots thanks to that processing capacity. It is also compatible with 8K recording at 30 fps and 4K at 120 fps with HDR. Less throttling. One of the most important novelties of these chips is Heath Path Block technology (HPB). This system improves thermal conductivity using new materials, which reduces thermal resistance and helps the chip maintain high performance for longer. It will therefore be more difficult for us to notice drops in chip performance due to potential overheating, for example in gaming sessions with the mobile phone that integrates this SoC. If that promise is fulfilled, we would be facing a potential solution to a problem that has traditionally been criticized in Exynos chips. Will we notice anything? The truth is that current SoCs are already true computing beasts in all sections and usually give so much room for maneuver that it is difficult to notice differences between them in our daily lives. That perception is misleading, because these hardware advances allow us to take advantage of that performance and efficiency “without realizing it.” Increasingly better photos captured and processed instantly, absolute fluidity in the interface even with high resolutions and refresh rates, or of course gaming in increasingly demanding games are scenarios in which these chips do their best. remains to be seen if Google finally goes ahead with its “PC mode”an area in which having powerful chips like this can offer a user experience much closer to the usual laptop/PC. Competition for Qualcomm. Theoretically, the Samsung chip will be able to compete head to head with the Qualcomm Snapdragon 8 Elite Gen 5. Some previous leaks That’s what they pointed out, but without a doubt we could be facing a great option for a market that will certainly benefit from that competition. Prepared for the Galaxy S26. Samsung is expected to use the new Exynos 2600 in its Galaxy S26 series, although it is not clear at the moment whether that decision will be global and will depend on the region. A global commitment would allow, for example, to integrate this chip on the Galaxy S26 and use Qualcomm chips only in the S26 Ultra, but everything remains to be confirmed. Of course, that type of strategy would be the definitive litmus test for Samsung Foundry, which in recent years has clearly been one step behind in performance and efficiency compared to its competitors. In Xataka | The Samsung Galaxy S26 will be much more than a phone for Samsung: the future of Exynos depends on it

Huawei has a patent with which to manufacture 2nm chips. The only problem is that it’s just a patent.

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Huawei has just applied for a patent in which a new and unique process of advanced chip production. The patent focuses on improving one of the limitations of the technology of deep ultraviolet photolithography (UVP) to try to compete in this way with the extreme ultraviolet machines (UVE) to which China still unable to access. There are, however, many uncertainties here. The patent. Huawei formally submitted the technical documentation in June 2022 to the Chinese patent office, allowing the invention to be “protected” since then. The detailed content of their study was made public in January 2025, but It is now that it has come to light. The patent is only applied for, not granted or granted. The patent office is examining the application to determine if it meets the requirements. Why is it important. This patent tries to address the limitations of the so-called edge placement error (EPE, Edge Placement Error) in the advanced interconnection process used when manufacturing advanced chips. The method discovered makes it theoretically possible to use “metal spacings” smaller than 21 nm, even when using deep ultraviolet (UVP) technology instead of extreme ultraviolet (UVE), which is the most advanced photolithographic technology today… and to which Chinese manufacturers like Huawei do not have access. If it achieves its objective, the firm could have access, for example, to chips that would theoretically compete even with chips made with 2nm photolithography. Metal spacing? That term (metal pitch in English) refers to the minimum distance that exists between the metal lines that form the interconnections within the integrated circuit or, in this case, the chip. These lines carry power and data signals between the transistors, and that metal spacing is extraordinarily small for advanced nodes. The objective of the patent is precisely to allow the manufacture of these lines with a spacing of less than 21 nm. This gives rise to a possible process that could compete with the 2nm UVE photolithography used, for example, by TSMC. The important word there is “could.” Edge Placement Error (EPE). EPE is the error that occurs when a pattern on a chip is not placed exactly where it was intended by the chip design. The closer that metal spacing is, the smaller the EPE margin must be to prevent the lines from touching and causing a short circuit. At this scale it is incredibly complex to solve this problem, and Huawei’s patent precisely proposes a way to achieve it. Supervitaminizing “old” lithography. What makes this method possible is that UVP photolithography, less powerful and advanced than UVE, can be used to compete with it. This method would allow “jumping” the limits that this process now faces, and which normally had many difficulties in going beyond 21 nm. A double hard mask process of two materials and a special patterning scheme are introduced that theoretically allow us to go below 21 nm. and even 5 nm which are already very complicated to achieve with EUV. In short: China could achieve advanced chips without the need for use the most advanced ASML machinesto which you do not have access. But. Although the technique is apparently striking, there are two big problems here. The first and most important is that this is just a patent and that does not mean that the process can be transferred to reality. The difficulties in doing so are enormous, and that leads us to the second problem: the effectiveness of production would probably be very low and the yield (process success rate) would be greatly affected. That is to say: of all the chips theoretically produced with this technique, only a small part would be valid, which would waste a huge part of the investment. In Xataka | In its race to make advanced chips, China has tried to copy ASML. It’s going wrong

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