TO SMIC (Semiconductor manufacturing international corp), The largest Chinese semiconductor manufacturer has cost it more than two years to refine its most advanced integration technology what is necessary to produce integrated 5 Nm circuits. And he has not just traveled this path. Huawei has traveled it from the hand of Huawei. Dr. Kim, an expert in chips manufacturing who has worked in Samsung and currently investigating TSMC in the US, He maintains that SMIC It is about to start the production of 5 Nm chips.
It is perfectly credible because, as we have just seen, we know with certainty that this company has been Working in this technology. And, in addition, Dr. Kim is a reliable source. However, this expert has pointed out something crucial that we should not overlook: the performance per wafer that SMIC has currently achieved in its 5 Nm nodes is less than 30%. When semiconductor manufacturers produce a chip wafer, some of those nuclei do not work properly. It is normal.
And when they launch a new lithographic node, their performance by wafer usually has a wide margin, but little by little, as engineers refine their integration processes, this parameter improves. A mature lithography can deliver to integrated circuit manufacturers a very high performance, but an incipient technology usually moves in the orbit of 50% performance, so only half of the chips produced work correctly.
SMIC 3 and 5 nm chips are possible thanks to the SAQP technique
The problem is that for an integration technology to be profitable from an economic point of view, its performance by wafer has to be At least 70%. And, as we have just seen, Dr. Kim argues that the SMIC 5 NM node is below 30%. It is objectively a very poor performance, but we know what this low figure explains: the technique used by this manufacturer to produce these semiconductors. It is known as Multiple patterningand SMIC has used it for more than a year and a half to make 7 NM chips for Huawei and other customers.
The 5 Nm chips that SMIC will manufacture for Huawei are possible thanks to a technology known as SAQP
This strategy consists in transferring the pattern to the wafer in several passes with the purpose of increasing the resolution of the lithographic process. It works, but is responsible for wafer performance is clearly improvable. However, in all probability the integrated 5 Nm circuits that presumably SMIC will manufacture soon for Huawei are possible Thanks to a technology known as SAQP (Self-alledhed Quadruple Patterning), which is nothing more than a Multiple patterning more aggressive and sophisticated than the one used to manufacture the soc Kirin 9000s of 7 nm and other chips.
A report published two days ago by the Taiwanese media Economic Daily News ensures that SMIC will start the manufacture of 3 Nm semiconductors equipped with GAA transistors (Gate-alall-around) For Huawei in 2026. However, this is not all. This article also maintains that this last company has already completed laboratory tests that pursue the manufacture of integrated circuits using carbon nanotubes. Huawei’s plan presumably is to give this innovation to SMIC to adapt it to large -scale production.
The enormous effort that Huawei, SMIC and other Chinese companies involved in the design and manufacture of semiconductors are the result of their inability to access the equipment of extreme ultraviolet photolithography (UVE) produced by the Dutch company Asml Because of US sanctions. With these SMIC machines could make 3 and 5 nm chips delivering a performance by wafer similar to that they have achieved TSMC or Samsung.
However, the need to produce these integrated circuits using deep ultraviolet equipment (UVP) of ASML, which are less sophisticated, forces them to resort to the SAQP technique. It works, as we have seen, but these companies lose a lot of competitiveness due to the poor performance by wafer and the high cost that this technology entails.
More information | Economic Daily News
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