the IMEC chip laboratory has manufactured the first qubit with ASML’s High-NA machine

Manufacture a qubit, the physical device that implements the minimum unit of information in the quantum computersit is not at all a piece of cake. There are several types: superconductors, ion traps, neutral atoms or ions implanted in macromolecules, among other variants. Not all of them are equally complexbut all are difficult to produce and manipulate. In fact, the ideal is to be able to manufacture them on a large scale in order to make possible the arrival of quantum machines equipped with many more qubits than the current ones. The first step in this direction was taken by Intel and QuTech, the research institute specialized in quantum computing that belongs to the Technical University of Delft, in the Netherlands. At the end of March 2024 they announced that they had managed to produce the first qubit industrially and using the same processes and technology that is currently used for manufacture semiconductors. However, it is now IMEC (Interuniversity Microelectronics Center), the most experienced laboratory in the development of new integration and nanotechnology technologies that we have in Europe, which has signed a very important milestone: has managed to manufacture a qubit using extreme ultraviolet (UVE) and high aperture (High-NA) photolithography equipment from ASML. Currently this is integrated circuit manufacturing machine most advanced that exists. Caressing the dream of industrial manufacturing of qubits for quantum machines IMEC’s ​​main laboratory resides in Leuven, Belgium and has collaborated closely with ASML for more than four decades. Thanks to this collaboration you have access to the most advanced lithography equipment of the Netherlands company. The qubit produced using ASML’s High-NA equipment is a silicon quantum dot spin type. These qubits are very interesting because they are considered the most promising candidates for industrial scaling. In fact, as IMEC assuresthey are known as “the qubits of industry.” IMEC has shown that the manufacturing of these qubits is largely compatible with the production of CMOS chips The really relevant news is that IMEC has demonstrated that the manufacturing of these qubits is largely compatible with the production of integrated circuits using CMOS technology (Complementary Metal-Oxide-Semiconductor or complementary metal oxide semiconductor). And therefore it is possible manufacture them in conventional semiconductor plants. An important note: CMOS is the transistor manufacturing technology behind virtually all modern chips. Sofie Beyne, the director of this project at IMEC, maintains that “We can leverage decades of semiconductor innovation and repurpose the entire silicon scale-up ecosystem, taking quantum devices beyond laboratory experiments into large-scale, fabricatable systems. This is where silicon-based qubits have a clear advantage.” Experts who research in the field of quantum computing they are convinced that having machines with millions of qubits will lead to the arrival of error correction technology, which is the holy grail of these computers. Broadly speaking, silicon quantum dot spin qubits confine an electron within a silicon nanostructure, so that the spin state of the trapped electron is used to store quantum information. This architecture requires that the spaces between the different doors be minimal in order to reduce environmental noise and minimize errors. Be that as it may, what is really important is that IMEC has managed to manufacture a network of qubits with spaces of just 6 nm. Thanks to the nanoscale of this component, millions of qubits could theoretically be integrated into a single chip. Image | IMEC More information | IMEC In Xataka | China has reached one of the holy grails of quantum physics. So says Peter Zoller, father of quantum computers

TSMC is not going to use its High-NA machines at the moment and has a compelling reason not to do so

On April 23, TSMC made official a strategic decision very important: has postponed the adoption of ASML’s extreme ultraviolet (EUV) and high aperture lithography machines until 2029. These are the equipment of manufacturing of more advanced integrated circuits that this company from the Netherlands currently has in its portfolio, and TSMC’s announcement caused ipso facto a drop of 3.3% of the value of its shares. It is not in vain that this Taiwanese chip producer is ASML’s largest client. In 2025 23.9% of total sales of this Dutch company came from TSMC. The main reason why this last company has decided not to use UVE High-NA machines of ASML in the short term is strictly economic. Each of them has a price of around 350 million euros, and, in addition, a single cutting-edge semiconductor plant requires the installation of several dozen of this equipment. TSMC considers that they are currently too expensive to make the manufacturing of advanced chips profitable. And, interestingly, Intel, Samsung and SK Hynix they are already adopting High-NA technology. This decision by TSMC brings great technical challenges The step taken by TSMC has not been improvised, as might be expected. In fact, over the past two years several managers at this company have publicly expressed doubts about the short-term adoption of ASML’s High-NA equipment. In January 2024 CC Wei, the current president and CEO of TSMC, surprised us with this statement: “We are studying it carefully, evaluating the maturity of the tool and examining its costs. We always make the right decision at the right time in order to offer the best service to our clients,” Wei assured. during a meeting. A few weeks earlier Szeho Ng, an analyst at China Renaissance, predicted that TSMC would not use ASML’s high-aperture UVE equipment until it introduced its 1nm integration technology. “We always make the right decision at the right time with the purpose of offering the best service to our clients” Last week it was Kevin Zhang, TSMC’s deputy chief operating officer, who clarified something very important: “I am amazed by our R&D team. They continue to find ways to drive technological development without using ASML’s High-NA UVE equipment. Someday we may have to use them, but right now we can continue to reap the benefits of current EUV technology without moving to High-NA which, as we all know, is extremely expensive.” In 2029, TSMC intends to have the A12 and A13 integration technologies ready for large-scale production, which are nothing more than derivatives of its A14 photolithography. From a commercial point of view these will be the first 1.2 and 1.3 nm technologies of this company. They will use GAA transistors (Gate-All-Around) and NanoFlex Pro technology. This latest innovation will allow IC designers to use fast cells for the critical parts of the GPU that need speed, and dense or efficient cells for the rest, thus optimizing the chip area down to the last millimeter. What we still do not know is what technical solutions TSMC engineers are going to implement to make it possible to manufacture 1.2 and 1.3 nm integrated circuits using ASML’s UVE equipment. It’s just a guess, but it seems unlikely that they will resort to the multiple patterning because this procedure compromises the performance per wafer and the cost of the semiconductors. TSMC would lose competitiveness. One last note: the multiple patterning Broadly speaking, it consists of transferring the pattern to the wafer in several passes with the purpose of increasing the resolution of the lithographic process. Image | ASML More information | Innovation Origins In Xataka | Bill Gates has X-rayed Intel. And his diagnosis is overwhelmingly accurate.

Intel has produced 30,000 wafers in its Uve High-NA teams

Joseph Bonetti is one of Intel’s engineers who defend that this company is about to be competitive again in the semiconductor manufacturing industry. This statement of yours a few days ago expresses your vision very well: “Intel leaders, Board of Directors of Intel and Donald Trump administration, please, They do not sell or give control From Intel Foundry to TSMC just when Intel is taking the technological front and starting to take off. It would be a terrible and demoralizing mistake. “ Although he does not expressly mention them, Bonetti suggests between the lines when he speaks of “the technological front” that Intel will take advantage of his experience with the teams of extreme ultraviolet lithography (UVE) and High Opening to recover leadership in the production of integrated circuits that lost many years ago. These machines produced by the Dutch company ASML are the most advanced semiconductor manufacturing equipment that currently exists. AND Intel has two in the testing phase in its Hillsboro (USA) plant. Next stop: 1.4 Nm The main chips manufacturers on the planet are beginning to gradually try the new ASML photolithography equipment, but Intel was the first company that was done with them. In fact, at the end of February 2024 his engineers concluded successfully The process ‘First Light’which is nothing other than the first phase of the installation and calibration of these machines. Just then they began to do the first tests with them. The 14A lithography (1.4 Nm) will be the first one in which Intel will use the Uve High opening equipment of ASML The 14A lithography (1.4 Nm) will be the first one in which Intel will use the UVE High opening equipment of ASML. His Roadmap It does not reveal the exact moment in which this integration technology will be ready, but it is reasonable to assume that this moment It will arrive in 2026 Because in 2027 the 14A-E lithography will be prepared, which will be nothing other than a review of the original 14A integration technology. Anyway, Intel’s current itinerary does not conclude with this node. Keyvan Esfarjani, which is one of the top responsible for the subsidiary of this company that specializes in the manufacture of integrated circuits, confirmed During the Intel Foundry Direct Connect event of 2024 that the production of chips in the 10A node (which will presumably be equivalent to the 1 Nm lithographs of its competitors) will begin at the end of 2027. It makes sense if we are in mind that in 2026 this company plans Have prepared the 14A node, although, yes, the manufacture of 1 NM semiconductors on a large scale will arrive later (possibly well entered 2028). Anyway, if what we want is to take the pulse at the current moment of Intel the news is promising. Last Monday this company confirmed that it has already prosecuted 30,000 wafers in its EUV High-Na Twinscan Exe: 5000 teams. And he has done it in a quarter. This performance would be modest if we were talking about fully implanted commercial technology, but it is promising if we consider that Intel and ASML engineers are still mired in The test and development phase of semiconductors with the new haute opening equipment. In fact, it is currently reasonable to anticipate that Intel will be the first chips manufacturer that will place integrated circuits produced with this technology, which could give it a very important competitive advantage. Image | ASML More information | Reuters In Xataka | Bill Gates has radiographed Intel. And his diagnosis is overwhelmingly accurate

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