Huawei has a patent with which to manufacture 2nm chips. The only problem is that it’s just a patent.

Huawei has just applied for a patent in which a new and unique process of advanced chip production. The patent focuses on improving one of the limitations of the technology of deep ultraviolet photolithography (UVP) to try to compete in this way with the extreme ultraviolet machines (UVE) to which China still unable to access. There are, however, many uncertainties here.

The patent. Huawei formally submitted the technical documentation in June 2022 to the Chinese patent office, allowing the invention to be “protected” since then. The detailed content of their study was made public in January 2025, but It is now that it has come to light. The patent is only applied for, not granted or granted. The patent office is examining the application to determine if it meets the requirements.

Why is it important. This patent tries to address the limitations of the so-called edge placement error (EPE, Edge Placement Error) in the advanced interconnection process used when manufacturing advanced chips. The method discovered makes it theoretically possible to use “metal spacings” smaller than 21 nm, even when using deep ultraviolet (UVP) technology instead of extreme ultraviolet (UVE), which is the most advanced photolithographic technology today… and to which Chinese manufacturers like Huawei do not have access. If it achieves its objective, the firm could have access, for example, to chips that would theoretically compete even with chips made with 2nm photolithography.

Metal spacing? That term (metal pitch in English) refers to the minimum distance that exists between the metal lines that form the interconnections within the integrated circuit or, in this case, the chip. These lines carry power and data signals between the transistors, and that metal spacing is extraordinarily small for advanced nodes. The objective of the patent is precisely to allow the manufacture of these lines with a spacing of less than 21 nm. This gives rise to a possible process that could compete with the 2nm UVE photolithography used, for example, by TSMC. The important word there is “could.”

Edge Placement Error (EPE). EPE is the error that occurs when a pattern on a chip is not placed exactly where it was intended by the chip design. The closer that metal spacing is, the smaller the EPE margin must be to prevent the lines from touching and causing a short circuit. At this scale it is incredibly complex to solve this problem, and Huawei’s patent precisely proposes a way to achieve it.

Supervitaminizing “old” lithography. What makes this method possible is that UVP photolithography, less powerful and advanced than UVE, can be used to compete with it. This method would allow “jumping” the limits that this process now faces, and which normally had many difficulties in going beyond 21 nm. A double hard mask process of two materials and a special patterning scheme are introduced that theoretically allow us to go below 21 nm. and even 5 nm which are already very complicated to achieve with EUV. In short: China could achieve advanced chips without the need for use the most advanced ASML machinesto which you do not have access.

But. Although the technique is apparently striking, there are two big problems here. The first and most important is that this is just a patent and that does not mean that the process can be transferred to reality. The difficulties in doing so are enormous, and that leads us to the second problem: the effectiveness of production would probably be very low and the yield (process success rate) would be greatly affected. That is to say: of all the chips theoretically produced with this technique, only a small part would be valid, which would waste a huge part of the investment.

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